L4Re Operating System Framework
Interface and Usage Documentation
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Data Structures
Here are the data structures with brief descriptions:
[detail level 12345]
 NBlock_device
 NcxxOur C++ library
 NL4L4 low-level kernel interface
 NL4drivers
 NL4ReL4Re C++ Interfaces
 NL4vbusC++ interface of the Vbus API.
 NL4vcpu
 NL4virtioL4-VIRTIO Transport C++ API
 CBufferData buffer used to transfer packets
 CElf32_AuxvAuxiliary vector (32-bit)
 CElf32_DynELF32 dynamic entry
 CElf32_EhdrELF32 header
 CElf32_PhdrELF32 program header
 CElf32_RelELF32 relocation entry w/o addend
 CElf32_RelaELF32 relocation entry w/ addend
 CElf32_ShdrELF32 section header
 CElf32_SymELF32 symbol table entry
 CElf64_AuxvAuxiliary vector (64-bit)
 CElf64_DynELF64 dynamic entry
 CElf64_EhdrELF64 header
 CElf64_PhdrELF64 program header
 CElf64_RelELF64 relocation entry w/o addend
 CElf64_RelaELF64 relocation entry w/ addend
 CElf64_ShdrELF64 section header
 CElf64_SymELF64 symbol table entry
 Cgfxbitmap_offsetOffsets in pmap[] and bmap[]
 Cl4_buf_regs_tEncapsulation of the buffer-registers block in the UTCB
 Cl4_exc_regs_tUTCB structure for exceptions
 Cl4_fpage_tL4 flexpage type
 Cl4_icu_info_tInfo structure for an ICU
 Cl4_icu_msi_info_tInfo to use for a specific MSI
 Cl4_kernel_info_mem_desc_tMemory descriptor data structure
 Cl4_kernel_info_tL4 Kernel Interface Page
 Cl4_msg_regs_tEncapsulation of the message-register block in the UTCB
 Cl4_msgtag_tMessage tag data structure
 Cl4_sched_cpu_set_tCPU sets
 Cl4_sched_param_tScheduler parameter set
 Cl4_snd_fpage_tSend-flexpage types
 Cl4_thread_regs_tEncapsulation of the thread-control-register block of the UTCB
 Cl4_timeout_sBasic timeout specification
 Cl4_timeout_tTimeout pair
 Cl4_vcon_attr_tVcon attribute structure
 Cl4_vcpu_arch_state_tArchitecture-specific vCPU state
 Cl4_vcpu_ipc_regs_tVCPU message registers
 Cl4_vcpu_regs_tVCPU registers
 Cl4_vcpu_state_tState of a vCPU
 Cl4_vm_svm_vmcb_control_areaVMCB structure for SVM VMs
 Cl4_vm_svm_vmcb_state_save_areaState save area structure for SVM VMs
 Cl4_vm_svm_vmcb_state_save_area_segState save area segment selector struct
 Cl4_vm_svm_vmcb_tControl structure for SVM VMs
 Cl4_vm_tz_stateState structure for TrustZone VMs
 Cl4_vm_vmx_vcpu_infos_tVMX information members
 Cl4_vm_vmx_vcpu_state_tVMX vCPU state
 Cl4_vm_vmx_vcpu_vmcs_tVMX software VMCS
 Cl4_vmx_offset_table_tSoftware VMCS field offset table
 Cl4re_aux_tAuxiliary descriptor
 Cl4re_ds_stats_tInformation about the data space
 Cl4re_elf_aux_mword_tAuxiliary vector element for a single unsigned data word
 Cl4re_elf_aux_tGeneric header for each auxiliary vector element
 Cl4re_elf_aux_vma_tAuxiliary vector element for a reserved virtual memory area
 Cl4re_env_cap_entry_tEntry in the L4Re environment array for the named initial objects
 Cl4re_env_tInitial environment data structure
 Cl4re_event_tEvent structure used in buffer
 Cl4re_video_color_component_tColor component structure
 Cl4re_video_goos_info_tGoos information structure
 Cl4re_video_pixel_info_tPixel_info structure
 Cl4re_video_view_info_tView information structure
 Cl4re_video_view_tC representation of a goos view
 Cl4shmc_ringbuf_head_tHead field of a ring buffer
 Cl4shmc_ringbuf_tRing buffer
 Cl4util_l4mod_infoBase module structure
 Cl4util_l4mod_modA single module
 Cl4util_mb_addr_range_tINT-15, AX=E820 style "AddressRangeDescriptor" ...with a "size" parameter on the front which is the structure size - 4, pointing to the next one, up until the full buffer length of the memory map has been reached
 Cl4util_mb_apm_tAPM BIOS info
 Cl4util_mb_drive_tDrive Info structure
 Cl4util_mb_info_tMultiBoot Info description
 Cl4util_mb_mod_tThe structure type "mod_list" is used by the multiboot_info structure
 Cl4util_mb_vbe_ctrl_tVBE controller information
 Cl4util_mb_vbe_mode_tVBE mode information
 Cl4vbus_device_tDetailed information about a vbus device
 Cl4vbus_resource_tDescription of a single vbus resource
 Cl4virtio_block_config_tDevice configuration for block devices
 Cl4virtio_block_discard_tStructure used for the write zeroes and discard commands
 Cl4virtio_block_header_tHeader structure of a request for a block device
 Cl4virtio_config_hdr_tL4-VIRTIO config header, provided in shared data space
 Cl4virtio_config_queue_tQueue configuration entry
 Cl4virtio_input_absinfo_tInformation about the absolute axis in the underlying evdev implementation
 Cl4virtio_input_config_tDevice configuration for input devices
 Cl4virtio_input_devids_tDevice ID information for the device
 Cl4virtio_input_event_tSingle event in event or status queue
 Cl4virtio_net_config_tDevice configuration for network devices
 Cl4virtio_net_header_tHeader structure of a request for a network device
 CL4virtio_portA Port on the Virtio Net Switch
 CMac_addrA wrapper class around the value of a MAC address
 CMac_tableMac_table manages a 1:n association between ports and MAC addresses
 CNet_transferA network request to only a single destination
 CRmRegion map
 CSwitch_factoryThe IPC interface for creating ports
 CVirtio_netThe Base class of a Port
 CVirtio_net_requestAbstraction for a network request
 CVirtio_switchThe Virtio switch contains all ports and processes network requests
 CVirtio_vlan_mangleClass for VLAN packet rewriting