This example shows how to start a newly created thread with a defined set of CPU registers.
This example shows how to start a newly created thread with a defined set of CPU registers.
#include <l4/sys/thread.h>
#include <l4/sys/ipc.h>
#include <l4/sys/utcb.h>
#include <l4/util/util.h>
#include <stdlib.h>
#include <stdio.h>
static char thread_stack[8 << 10];
{
while (1)
{
printf("hey, I'm a thread\n");
printf("got register values: %ld %ld %ld %ld %ld %ld %ld\n",
d[7], d[6], d[5], d[4], d[2], d[1], d[0]);
}
}
asm(
".global thread \n"
"thread: \n"
#ifdef ARCH_x86
" pusha \n"
" push %esp \n"
" call thread_func \n"
#endif
#ifdef ARCH_arm
" push {r0-r7} \n"
" mov r0, sp \n"
" bl thread_func \n"
#endif
#ifdef ARCH_arm64
" stp x0, x1, [sp, #0]! \n"
" stp x2, x3, [sp, #0]! \n"
" stp x4, x5, [sp, #0]! \n"
" stp x6, x7, [sp, #0]! \n"
" mov x0, sp \n"
" bl thread_func \n"
#endif
);
extern void thread(void);
int main(void)
{
int err;
printf("Example showing how to start a thread with an exception.\n");
printf("Make sure to start this program with ldr-flags=eager_map\n");
return 1;
return 1;
L4RE_THIS_TASK_CAP);
return 2;
return 3;
return 4;
{
printf("Umm, ipc error: %x\n", err);
return 1;
}
{
printf("PF?: %lx %lx (not prepared to handle this) %ld\n",
return 1;
}
#ifdef ARCH_x86
#endif
#ifdef ARCH_arm
#endif
#ifdef ARCH_arm64
#endif
tag =
l4_msgtag(0, L4_UTCB_EXCEPTION_REGS_SIZE, 0, 0);
printf("Error sending IPC: %x\n", err);
while (1)
return 0;
}
Capability allocator C interface.
Common factory related definitions.
l4_cap_idx_t l4re_util_cap_alloc(void) L4_NOTHROW
Get free capability index at capability allocator.
l4re_env_t * l4re_env(void) L4_NOTHROW
Get L4Re initial environment.
unsigned long l4_umword_t
Unsigned machine word.
unsigned long l4_cap_idx_t
Capability selector type.
unsigned l4_is_invalid_cap(l4_cap_idx_t c) L4_NOTHROW
Test if a capability selector is the invalid capability.
l4_msgtag_t l4_factory_create_thread(l4_cap_idx_t factory, l4_cap_idx_t target_cap) L4_NOTHROW
Create a new thread.
l4_msgtag_t l4_ipc_receive(l4_cap_idx_t object, l4_utcb_t *utcb, l4_timeout_t timeout) L4_NOTHROW
Wait for a message from a specific source.
l4_msgtag_t l4_ipc_send(l4_cap_idx_t dest, l4_utcb_t *utcb, l4_msgtag_t tag, l4_timeout_t timeout) L4_NOTHROW
Send a message to an object (do not wait for a reply).
long l4_error(l4_msgtag_t tag) L4_NOTHROW
Get IPC error code if any or message tag label otherwise for an IPC call.
l4_umword_t l4_ipc_error(l4_msgtag_t tag, l4_utcb_t *utcb) L4_NOTHROW
Get the IPC error code for an IPC operation.
unsigned l4_msgtag_is_exception(l4_msgtag_t t) L4_NOTHROW
Test for exception protocol.
l4_msgtag_t l4_msgtag(long label, unsigned words, unsigned items, unsigned flags) L4_NOTHROW
Create a message tag from the specified values.
long l4_msgtag_label(l4_msgtag_t t) L4_NOTHROW
Get the protocol of tag.
l4_msgtag_t l4_scheduler_run_thread(l4_cap_idx_t scheduler, l4_cap_idx_t thread, l4_sched_param_t const *sp) L4_NOTHROW)
Run a thread on a Scheduler.
l4_sched_param_t l4_sched_param(unsigned prio, l4_umword_t quantum=0) L4_NOTHROW
Construct scheduler parameter.
l4_msgtag_t l4_thread_ex_regs(l4_cap_idx_t thread, l4_addr_t ip, l4_addr_t sp, l4_umword_t flags) L4_NOTHROW
Exchange basic thread registers.
@ L4_THREAD_EX_REGS_TRIGGER_EXCEPTION
Trigger artificial exception in thread.
void l4_thread_control_bind(l4_utcb_t *thread_utcb, l4_cap_idx_t task) L4_NOTHROW
Bind the thread to a task.
l4_msgtag_t l4_thread_control_commit(l4_cap_idx_t thread) L4_NOTHROW
Commit the thread control parameters.
void l4_thread_control_exc_handler(l4_cap_idx_t exc_handler) L4_NOTHROW
Set the exception handler.
void l4_thread_control_start(void) L4_NOTHROW
Start a thread control API sequence.
void l4_thread_control_pager(l4_cap_idx_t pager) L4_NOTHROW
Set the pager.
#define L4_IPC_NEVER
never timeout
struct l4_utcb_t l4_utcb_t
Opaque type for the UTCB.
l4_utcb_t * l4_utcb(void) L4_NOTHROW L4_PURE
Get the UTCB address.
#define L4_STICKY(x)
Mark symbol sticky (even not there)
void l4_sleep(l4_uint32_t ms) L4_NOTHROW
Suspend thread for a period of ms milliseconds.
UTCB structure for exceptions.
l4_umword_t sp
stack pointer
l4_umword_t ip
instruction pointer
l4_umword_t r[13]
registers
l4_umword_t edx
edx register
l4_umword_t esi
esi register
l4_umword_t ebp
ebp register
l4_umword_t eax
eax register
l4_umword_t ecx
ecx register
l4_umword_t ebx
ebx register
l4_umword_t edi
edi register
Message tag data structure.