L4Re Operating System Framework
Interface and Usage Documentation
|
Functions | |
int | l4vbus_pci_cfg_read (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width) |
Read from the vPCI configuration space using the PCI root bridge. | |
int | l4vbus_pci_cfg_write (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width) |
Write to the vPCI configuration space using the PCI root bridge. | |
int | l4vbus_pci_irq_enable (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, int pin, unsigned char *trigger, unsigned char *polarity) |
Enable PCI interrupt for a specific device using the PCI root bridge. | |
int | l4vbus_pcidev_cfg_read (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width) |
Read from the device's vPCI configuration space. | |
int | l4vbus_pcidev_cfg_write (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width) |
Write to the device's vPCI configuration space. | |
int | l4vbus_pcidev_irq_enable (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, unsigned char *trigger, unsigned char *polarity) |
Enable the device's PCI interrupt. | |
int l4vbus_pci_cfg_read | ( | l4_cap_idx_t | vbus, |
l4vbus_device_handle_t | handle, | ||
l4_uint32_t | bus, | ||
l4_uint32_t | devfn, | ||
l4_uint32_t | reg, | ||
l4_uint32_t * | value, | ||
l4_uint32_t | width | ||
) |
Read from the vPCI configuration space using the PCI root bridge.
vbus | Capability of the system bus | |
handle | Device handle of the PCI root bridge | |
bus | Bus number | |
devfn | Device id (upper 16bit) and function (lower 16bit) | |
reg | Register in configuration space to read | |
[out] | value | Value that has been read |
width | Width to read in bits (e.g. 8, 16, 32) |
Referenced by L4vbus::Pci_host_bridge::cfg_read().
int l4vbus_pci_cfg_write | ( | l4_cap_idx_t | vbus, |
l4vbus_device_handle_t | handle, | ||
l4_uint32_t | bus, | ||
l4_uint32_t | devfn, | ||
l4_uint32_t | reg, | ||
l4_uint32_t | value, | ||
l4_uint32_t | width | ||
) |
Write to the vPCI configuration space using the PCI root bridge.
vbus | Capability of the system bus |
handle | Device handle of the PCI root bridge |
bus | Bus number |
devfn | Device id (upper 16bit) and function (lower 16bit) |
reg | Register in configuration space to write |
value | Value to write |
width | Width to write in bits (e.g. 8, 16, 32) |
Referenced by L4vbus::Pci_host_bridge::cfg_write().
int l4vbus_pci_irq_enable | ( | l4_cap_idx_t | vbus, |
l4vbus_device_handle_t | handle, | ||
l4_uint32_t | bus, | ||
l4_uint32_t | devfn, | ||
int | pin, | ||
unsigned char * | trigger, | ||
unsigned char * | polarity | ||
) |
Enable PCI interrupt for a specific device using the PCI root bridge.
vbus | Capability of the system bus | |
handle | Device handle of the PCI root bridge | |
bus | Bus number | |
devfn | Device id (upper 16bit) and function (lower 16bit) | |
pin | Interrupt pin (normally as reported in configuration register INTR) | |
[out] | trigger | False if interrupt is level-triggered |
[out] | polarity | True if interrupt is of low polarity |
Referenced by L4vbus::Pci_host_bridge::irq_enable().
int l4vbus_pcidev_cfg_read | ( | l4_cap_idx_t | vbus, |
l4vbus_device_handle_t | handle, | ||
l4_uint32_t | reg, | ||
l4_uint32_t * | value, | ||
l4_uint32_t | width | ||
) |
Read from the device's vPCI configuration space.
vbus | Capability of the system bus | |
handle | Device handle of the PCI device | |
reg | Register in configuration space to read | |
[out] | value | Value that has been read |
width | Width to read in bits (e.g. 8, 16, 32) |
Referenced by L4vbus::Pci_dev::cfg_read().
int l4vbus_pcidev_cfg_write | ( | l4_cap_idx_t | vbus, |
l4vbus_device_handle_t | handle, | ||
l4_uint32_t | reg, | ||
l4_uint32_t | value, | ||
l4_uint32_t | width | ||
) |
Write to the device's vPCI configuration space.
vbus | Capability of the system bus |
handle | Device handle of the PCI device |
reg | Register in configuration space to write |
value | Value to write |
width | Width to write in bits (e.g. 8, 16, 32) |
Referenced by L4vbus::Pci_dev::cfg_write().
int l4vbus_pcidev_irq_enable | ( | l4_cap_idx_t | vbus, |
l4vbus_device_handle_t | handle, | ||
unsigned char * | trigger, | ||
unsigned char * | polarity | ||
) |
Enable the device's PCI interrupt.
vbus | Capability of the system bus | |
handle | Device handle of the PCI device | |
[out] | trigger | False if interrupt is level-triggered |
[out] | polarity | True if interrupt is of low polarity |
Referenced by L4vbus::Pci_dev::irq_enable().